? semiconductor components industries, llc, 2015 august, 2015 ? rev. 13 1 publication order number: mc10elt21/d mc10elt21, mc100elt21 5 v?differential pecl to ttl translator description the mc10elt/100elt21 is a differential pecl to ttl translator. because pecl (positive ecl) levels are used, only +5 v and ground are required. the small outline 8-lead package and the single gate of the elt21 makes it ideal for those applications where space, performance and low power are at a premium. the v bb pin, an internally generated voltage supply, is available to this device only. for single-ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. the 100 series contains temperature compensation. features ? 3.5 ns typical propagation delay ? 24 ma ttl output ? flow through pinouts ? operating range: v cc = 4.75 v to 5.25 v with gnd = 0 v ? q output will default low with inputs left open or < 1.3 v ? these devices are pb?free, halogen free/bfr free and are rohs compliant a = assembly location l = wafer lot y = year w = work week = pb?free package h = mc10 k = mc100 soic?8 d suffix case 751 marking diagrams* tssop?8 dt suffix case 948r alyw ht21 alyw kt21 1 8 1 8 1 8 www. onsemi.com *for additional marking information, refer to application note and8002/d. see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information 1 8 hlt21 alyw 1 8 klt21 alyw 1 8 (note: microdot may be in either location)
mc10elt21, mc100elt21 www. onsemi.com 2 1 2 3 45 6 7 8 q0 gnd v cc d0 nc d0 v bb nc pecl ttl figure 1. 8?lead pinout and logic diagram (top view) table 1. pin description pin function q0 ttl outputs d0, do pecl differential outputs v bb reference voltage output v cc positive supply gnd ground nc no connect table 2. attributes characteristics value internal input pulldown resistor 50 k internal input pullup resistor n/a esd protection human body model > 2 kv moisture sensitivity, indefinite time out of drypack (note 1) pb?free pkg soic?8 tssop?8 level 1 level 3 flammability rating oxygen index: 28 to 34 ul 94 v?0 @ 0.125 in transistor count 81 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d. table 3. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl power supply gnd = 0 v 7 v v in pecl input voltage gnd = 0 v v i v cc 0 to 6 v i bb v bb sink/source 0.5 ma ta operating temperature range ?40 to +85 c t stg storage temperature range ?65 to +150 c ja thermal resistance (junction?to?ambient) 0 lfpm 500 lfpm soic?8 soic?8 190 130 c/w c/w jc thermal resistance (junction?to?case) standard board soic?8 41 to 44 c/w ja thermal resistance (junction?to?ambient) 0 lfpm 500 lfpm tssop?8 tssop?8 185 140 c/w c/w t sol wave solder pb?free <2 to 3 sec @ 260 c 265 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected.
mc10elt21, mc100elt21 www. onsemi.com 3 table 4. 10elt series pecl input dc characteristics v cc = 5.0 v; gnd = 0.0 v (note 2) symbo l characteristic ?40 c 25 c 85 c unit min typ max min typ max min typ max v ih input high voltage (single?ended) 3770 4110 3870 4190 3930 4265 mv v il input low voltage (single?ended) 3050 3500 3050 3520 3050 3555 mv v bb output voltage reference 3.57 3.7 3.65 3.75 3.69 3.81 v v ihcmr input high voltage common mode range (differential configuration) (note 3) 2.2 5.0 2.2 5.0 2.2 5.0 v i ih input high current 255 175 175 a i il input low current 0.5 0.5 0.3 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 2. output parameters vary 1:1 with v cc . v cc can vary 0.25 v. 3. v ihcmr min varies 1:1 with gnd, v ihcmr max varies 1:1 with v cc . table 5. 100elt series pecl input dc characteristics v cc = 5.0 v; gnd = 0.0 v (note 4) symbo l characteristic ?40 c 25 c 85 c unit min typ max min typ max min typ max v ih input high voltage (single?ended) 3835 4120 3835 4120 3835 4120 mv v il input low voltage (single?ended) 3190 3525 3190 3525 3190 3525 mv v bb output voltage reference 3.62 3.74 3.62 3.74 3.62 3.745 v v ihcmr input high voltage common mode range (differential configuration) (note 5) 2.2 5.0 2.2 5.0 2.2 5.0 v i ih input high current 255 175 175 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 4. input parameters vary 1:1 with v cc . v cc can vary 0.25 v. 5. v ihcmr min varies 1:1 with gnd, v ihcmr max varies 1:1 with v cc . table 6. ttl output dc characteristics v cc = 4.75 v to 5.25 v; t a = ?40 c to 85 c) symbol characteristic condition min typ max unit v oh output high voltage i oh = ?3.0 ma 2.4 (note 6) v v ol output low voltage i ol = 24 ma 0.5 v i cch power supply current 20 29 ma i ccl power supply current 22 32 ma i os output short circuit current ?150 ?60 ma note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 6. maximum level is v cc ? 0.7 by design.
mc10elt21, mc100elt21 www. onsemi.com 4 ac characteristics v cc = 4.75 v to 5.25 v; gnd = 0.0 v (note 7) symbo l characteristic ?40 c 25 c 85 c unit min typ max min typ max min typ max f max maximum toggle frequency 100 mhz t jitter random clock jitter (rms) 35 ps t plh propagation delay @ 1.5 v 2.0 5.5 2.0 5.5 2.0 5.5 ns t phl propagation delay @ 1.5 v 2.0 5.5 2.0 5.5 2.0 5.5 ns v pp input swing (note 8) 200 1000 200 1000 200 1000 mv t r /t f output rise/fall time (10?90%) 750 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. 7. r l = 500 to gnd and c l = 20 pf to gnd. refer to figure 2. 8. v pp (min) is the minimum input swing for which ac parameters are guaranteed. the device has a dc gain of 40. figure 2. ttl output loading used for device evaluation characteristic test c l *r l ac test load gnd *c l includes fixture capacitance application ttl receiver
mc10elt21, mc100elt21 www. onsemi.com 5 ordering information device package shipping ? mc10elt21dg soic?8 (pb?free) 98 units / rail mc10elt21dr2g soic?8 (pb?free) 2500 / tape & reel mc10elt21dtg tssop?8 (pb?free) 100 units / rail mc10elt21dtr2g tssop?8 (pb?free) 2500 / tape & reel MC100ELT21DG soic?8 (pb?free) 98 units / rail mc100elt21dr2g soic?8 (pb?free) 2500 / tape & reel mc100elt21dtg tssop?8 (pb?free) 100 units / rail mc100elt21dtr2g tssop?8 (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc10elt21, mc100elt21 www. onsemi.com 6 package dimensions soic?8 nb case 751?07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc10elt21, mc100elt21 www. onsemi.com 7 package dimensions dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ?u? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ?t? ?v? ?w? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop?8 dt suffix case 948r?02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane -w-. mc10elt21/d eclinps is a trademark of semiconductor components industries, llc (scillc). on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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